Raw on-chip voltage and temperature recordings during periodic synthetic reading of FPGA block-memory from a Basys 3
Raw XADC recordings of periodic FPGA block-memory reads This dataset contains the raw on-chip supply-voltage recordings behind the article "Observability of FPGA Memory Activity through VCCBRAM: An Experimental Characterization of Coherent Aliasing" (submitted to&
Raw XADC recordings of periodic FPGA block-memory reads
This dataset contains the raw on-chip supply-voltage recordings behind the article “Observability of FPGA Memory Activity through VCCBRAM: An Experimental Characterization of Coherent Aliasing” (submitted to The Journal of Supercomputing; reference to be added on publication).
Block random-access memories (BRAMs) of Artix-7 FPGAs (Digilent Basys 3 boards) were read periodically under controlled configurations, while the built-in XADC sampled the VCCBRAM supply rail. The memory readers and the XADC run from the same 100 MHz clock. The recordings allow the spectra, line positions, amplitudes and detection scores reported in the article to be recomputed.
At a glance
| VCCBRAM recordings | 16 150, of 4000 samples each |
| Other channels | VCCINT, VCCAUX and on-chip temperature, recorded alongside VCCBRAM on Device 2 |
| Devices | 2 (Device 1 and Device 2, as labeled in the article) |
| Sampling rate | 120 192.31 samples/s per channel (one sample every 832 clock cycles) |
| Format | CSV, raw integer XADC codes, no processing applied |
| Size | about 1.5 GB of CSV files (60 850 files) |
Contents
In this record, each experiment is distributed as one ZIP archive named after its folder, for example d8_prescaler_sweep.zip. Extracting all archives into one folder recreates raw_data/, with one subfolder per experiment.
| Folder | Purpose in the article | Device | Configurations | Recordings per configuration |
|---|---|---|---|---|
d8_prescaler_sweep | Main sweep: comb positions and sampling-phase classes | 1 | P = 1–25 | 50 |
d8_replication | Replication of the main sweep | 2 | P = 1–25 | 100 |
experiment_a_uniform_hamming_weight | Experiment A: uniform words of Hamming weight 0–16 | 2 | 9 words at P = 15 and at P = 25 | 100 |
experiment_a_bit_layout | Experiment A: four arrangements of Hamming weight 8 | 2 | 4 words at P = 15 | 100 |
experiment_b_spectral_envelope | Experiment B: response envelope | 2 | P = 27–49 (11 prescalers) | 100 |
experiment_c_effective_response | Experiment C: effective pulse extent | 2 | P = 44, 48, 50, 62, 80, 96, 112, 160 | 10📤 Share this pageFound this useful? Share it with your network. Files are hosted on the source repository. Click download to access the full dataset. Ramos García, Alberto (2026). Raw on-chip voltage and temperature recordings during periodic synthetic reading of FPGA block-memory from a Basys 3. https://doi.org/10.5281/zenodo.23209687
|