Academic Journal
Q2IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
About IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits is a scholarly journal published by Institute of Electrical and Electronics Engineers Inc.. SCImago 2025 lists it in Q2, with an SJR of 0.653 and H-index of 30.
Coverage: 2015-2026. Research categories: Electrical and Electronic Engineering (Q2); Electronic, Optical and Magnetic Materials (Q2); Hardware and Architecture (Q2).
Open-access policies and author information
Reported in the official DOAJ public CSV snapshot (2026-09-01), downloaded 2026-10-03. Record updated 2026-03-12. This snapshot does not establish today’s listing status or fee quotation.
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Source-backed journal facts
Topics in published research
Ferroelectric and Negative Capacitance Devices; Advanced Memory and Neural Computing; Parallel Computing and Optimization Techniques; Semiconductor materials and devices; Advancements in Semiconductor Devices and Circuit Design; Magnetic properties of thin films.
OpenAlex classifies topics from published works. These topics are not the publisher’s official aims and scope.
Source: OpenAlex source record. Retrieved 2026-10-03. Source record updated 2026-10-02. OpenAlex metrics are different from SCImago metrics and the Clarivate Journal Impact Factor.
Journal Metrics
Quartile, SJR and the listed SCImago H-index use the 2025 imported SCImago dataset. A quartile may vary by subject category. Values without a source or reporting year are unverified historical entries. Verify the current Journal Impact Factor with Clarivate or the publisher before using it.
Aims & Scope
The publisher’s official aims and scope have not yet been verified for this profile. Use the journal website to check subject fit and accepted article types before submitting.
Recent Research Articles
Latest publications matched automatically by ISSN.
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2026 · DOI: 10.1109/jxcdc.2026.3680281A CMOS Probabilistic Computing Chip With Hardware-Aware Learning
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2026 · DOI: 10.1109/jxcdc.2026.3689506Antiferromagnetic Programmable Neuron: Structure, Training, and Pattern Recognition Applications
I. Sotnyk, O. Prokopenko
2026 · DOI: 10.1109/jxcdc.2025.3633490Self-Heating and Parasitic Effects in Multi-Tier CFET Design
Sufia Shahin, Mahdi Benkhelifa, Yogesh Singh Chauhan, Hussam Amrouch et al.
2026 · DOI: 10.1109/jxcdc.2026.3704373The Impact of Magnetic Field on Defective FDSOI and FinFET Devices
Munazza Sayed, Hussam Amrouch
2026 · DOI: 10.1109/jxcdc.2026.36869041-Transistor-Dynamic Random Access Memory as Reservoir for Temporal Signal Processing
Md Yasir Bashir, Lalith Adithya Sai C., Shubham Sahay
2026 · DOI: 10.1109/jxcdc.2026.3690766P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments
Christian Duffee, Jordan Athas, Igor Kadota, Randall Berry et al.
2026 · DOI: 10.1109/jxcdc.2026.3690563A Threshold-Voltage Self-Compensated Dual-Gate IGZO TFT Cell for Robust In-Sensor Computing
Zhi Li, Zikang Mei, Wei Tang
2026 · DOI: 10.1109/jxcdc.2026.3736074Design and Analysis of a Three-Stream STT-MTJ TRNG With XOR and Majority Voter Logic as Postprocessing Architectures
M. Satwik Rai, Akshaja Kanugovi, Vinod Kumar Joshi
2026 · DOI: 10.1109/jxcdc.2026.3671608Topology-Aware Layout Design for Area-Decoupled Transistor Sizing in Multitier CFET SRAM
Yutian Zhang, Jiaquan Fang, Khawar Sarfraz, Mansun Chan et al.
2026 · DOI: 10.1109/jxcdc.2026.3709007Reviews
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October 2, 2026 at 9:10 pm
October 2, 2026