IEEE Transactions on Very Large Scale Integration (VLSI) Systems

About IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Overview

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, universally abbreviated TVLSI, is a peer-reviewed monthly journal that publishes archival research on the design and realization of microelectronic systems using VLSI and ULSI (ultra-large-scale integration) technologies. Since its launch in 1993, it has been one of the principal venues where the world's chip-design community documents how silicon systems are conceived, partitioned, synthesized, verified, and tested.

The journal is co-sponsored by three IEEE societies — the IEEE Circuits and Systems Society (CASS), the IEEE Computer Society (CS), and the IEEE Solid-State Circuits Society (SSCS) — a sponsorship structure that reflects the deeply interdisciplinary nature of the field. Real VLSI design requires collaboration across system architecture, logic and circuit design, silicon fabrication, packaging, and testing, and TVLSI positions itself as the common forum where all of those strands meet.

Modern computing is, in essence, VLSI made concrete: every microprocessor, graphics processor, AI accelerator, and memory chip is an integrated circuit whose design flows through the abstraction levels TVLSI covers — system, register-transfer, logic, circuit, transistor, and process. By publishing research that spans this full hierarchy, the journal serves as an archival record of how the semiconductor industry and its academic foundations have evolved from the era when VLSI meant hundreds of thousands of transistors on a die to today's chips carrying billions of transistors.

TVLSI is indexed in the Science Citation Index Expanded (Web of Science), Scopus, and dblp, and it is frequently ranked among the leading journals in computer hardware architecture and electronic engineering. Its monthly frequency supports a large annual volume of research articles, covering both long-form papers and shorter Transactions Briefs.

For authors, the journal offers the prestige and visibility of an IEEE Transactions publication with the readership of three major IEEE societies. For readers — chip architects, CAD engineers, test engineers, and graduate students — it is a working reference for design methodologies, test techniques, and circuit architectures that eventually appear in commercial silicon.

Quick Facts

Aims and Scope

TVLSI's official scope statement, maintained through the IEEE Circuits and Systems Society and on the journal's IEEE pages, defines the journal as the forum for research on the design and realization of microelectronic systems using VLSI and ULSI technologies. Paraphrased from the official statement, the journal seeks work that requires collaboration among scientists and engineers in systems architecture, logic and circuit design, chip and wafer fabrication, packaging, testing, and systems applications. The generation of specifications, design, and verification must be performed across abstraction levels — system, register-transfer, logic, circuit, transistor, and process.

The editorial board invites original papers that emphasize the novel system-integration aspects of microelectronic systems. In practical terms this means the journal favors work where the contributions concern how a whole microelectronic system is designed, integrated, and validated, rather than narrow device physics or isolated circuit theory. Coverage explicitly centers on nanometer VLSI systems integration.

Topics of special interest named in the official scope include:

• System specification, design, and partitioning
• System-level test and reliable VLSI/ULSI systems
• High-performance computing and communication systems
• Wafer-scale integration and multichip modules (MCMs)
• High-speed interconnects in microelectronic systems
• VLSI/ULSI neural networks and their applications
• Adaptive computing systems using reconfigurable components (FPGAs)
• Mixed analog/digital systems
• Cost–performance tradeoffs of VLSI/ULSI systems

The journal's scope statement further specifies that analog and mixed-signal submissions must be consistent with the VLSI/ULSI implementation emphasis — work in pure analog circuit theory without an implementation angle belongs elsewhere. To handle the breadth of submissions, the editorial board rolled out a formal EDICS (Editorial Information Classification Scheme) taxonomy in 2023 comprising 19 overarching categories: analog and mixed-signal (AMS), RF and microwave (RF), digital circuits (DIGI), high-speed IC (HSIC), memory (MEM), processing in and near memory (PIM), deep neural networks (DNN), neuromorphic (SNN), security (SEC), electronic design automation (EDA), testing and reliability (TEST), processor design (CPU), and Internet of Things (IoT), each with multiple sub-EDICS. This taxonomy steers manuscripts to the right associate editors and reviewers and signals the journal's modern coverage: deep-learning accelerators, in-memory computing, hardware security, and 3-D integrated circuits all sit squarely inside TVLSI's remit.

History

IEEE Transactions on Very Large Scale Integration (VLSI) Systems was founded in 1993, a timing that reflects the VLSI design community's need for a single archival venue spanning the full design hierarchy. The 1970s and 1980s had transformed integrated-circuit design: design-automation tools made it practical to build ever more complex chips, and the VLSI design flow — from behavioral specification down through synthesis, physical design, fabrication, and test — had matured into a discipline in its own right. The new journal was created to hold research at every one of those levels in one place.

From the beginning, the journal was organized under the joint sponsorship of the Circuits and Systems, Computer, and Solid-State Circuits societies — an unusual tri-society structure that persists to this day and that mirrors the reality that VLSI systems work cuts across the traditional boundaries of circuits, computer architecture, and device engineering.

Over more than three decades, TVLSI's pages track the industry's great technology arcs. The 1990s issues document high-level synthesis, register-transfer-level design, and the move from micron to sub-micron processes. The 2000s brought deep-submicron challenges: leakage power, variability, and nanometer interconnect. The journal's landmark cryptography-hardware papers — including high-speed AES architectures published in the early 2000s — landed just as AES was being standardized by NIST and adopted worldwide. The 2010s issues record the FinFET transition, the rise of hardware security and Trojan detection as first-class concerns, and the first wave of deep-learning hardware accelerators. Recent issues emphasize AI and neural-network hardware, processing in memory, 3-D integration and chiplets, emerging memories such as resistive RAM and phase-change memory, and reliability under sub-10-nanometer variability.

Editorial stewardship has been provided by internationally recognized researchers. Professor Niraj K. Jha of Princeton University served a term as Editor-in-Chief (an editorial announcing a new Editor-in-Chief appeared in the 2011 volume), and the current Editor-in-Chief is Professor Mircea Stan of the University of Virginia, acknowledged as such in the journal's January 2026 issue. The editorial board has grown steadily in international breadth, reflecting the journal's global author base across North America, East Asia, and Europe.

Editorial Leadership

The journal's Editor-in-Chief is Prof. Mircea Stan, identified as Editor-in-Chief of IEEE TVLSI in the January 2026 special-section editorial (Volume 34, No. 1). A call for Editor-in-Chief nominations issued by the IEEE Circuits and Systems Society in 2024 sought candidates for the 2025–2026 term, confirming the standard rotating EiC appointment structure used across IEEE Transactions.

Supporting the Editor-in-Chief is an international editorial board of associate editors drawn from academia and industry, covering the journal's 19 EDICS topic categories. The board's composition is periodically refreshed through editorial announcements in the journal itself (for example, a 2010 editorial announced new associate editor appointments). TVLSI also periodically organizes special sections and special issues — such as the ISCAS 2025 special section — coordinated by guest editors, which showcase selected work from major conferences and emerging research themes.

Manuscript screening follows the IEEE Publication Services and Products Board (PSPB) operations standards: every article is reviewed by a minimum of two independent reviewers under a single-blind peer review process, and articles are screened for plagiarism before acceptance.

Metrics and Rankings

The following metrics are reported by third-party bibliometric sources and IEEE's own pages. They are included only where a public source could be identified; figures that could not be verified from an official source are stated as such.

• Journal Impact Factor (JCR, Clarivate): 3.2 — reported by Web of Science journal data (wos-journal.info) as the journal's most recent JCR value. The IEEE CASS TVLSI page lists Impact Factor 3.1 and Article Influence Score 0.558; the small discrepancy reflects different JCR release years and reporting dates. Older trajectory (per bioxbio historical data): 2.775 (2021), 2.8 (2022), 3.1 (2024), 3.2 (2025/2026 update).
• CiteScore (Scopus): 5.4 per the IEEE CASS TVLSI bibliometrics panel; researcher.life reports 5.9. The discrepancy is likely due to different CiteScore release years — treat the current value as approximately 5.4–5.9.
• SJR (SCImago Journal Rank): sources disagree — 0.744 (countryofpapers, Scimago-sourced) versus 1.041 (journalsearches). Both report a best quartile of Q2 in their categories. Because the sources could not be reconciled to a single official SCImago snapshot, readers should check the current SCImago page for the journal.
• Scopus H-index: 122 (countryofpapers, Scopus/SJR data).
• Categories/ranks: Q2 in Computer Science — Hardware & Architecture (24/48) and Q2 in Engineering, Electrical & Electronic (121/240) per OOIR's four-year publication-based analysis; also indexed under Software in Scopus category schemes.
• Annual volume: recent OOIR analysis counts 1,051 papers over a four-year window with an average of about 5.05 citations per paper and a median of 2.

Figures not officially published and therefore NOT stated: acceptance rate (IEEE does not publish a TVLSI acceptance rate publicly); first-decision and review times; the exact Open Access APC amount for TVLSI specifically (the journal is a hybrid journal offering traditional or author-pays OA submission, but IEEE's official CASS page does not name a TVLSI-specific OA fee figure, so we do not assert one — check the current author-information page or the ScholarOne submission site).

Submission and Publishing Information

Manuscripts are submitted electronically through ScholarOne Manuscripts at mc.manuscriptcentral.com/tvlsiieee, the dedicated submission portal for the journal. The journal's official author guidance notes the following:

• Article types: Full research papers and Transactions Briefs. Briefs include corrections, rebuttals of previous briefs, comments on published results, discussions of experiences using published results, conjectures, posing of new problems, and announcements of new results — in a correspondence format.
• Originality: Papers must contain original contributions and must not duplicate descriptions or derivations available elsewhere. Submission attests that the manuscript has not been copyrighted, published, or submitted elsewhere. Expanded versions of conference papers may be submitted.
• Access model: TVLSI is a hybrid journal. Authors may choose traditional subscription publication (no open-access payment required) or open-access (author-pays OA) publication for unrestricted public access. Corresponding authors from low-income countries are eligible for waived or reduced open access APCs under IEEE policy.
• Page charges: IEEE's general practice for co-sponsored CASS transactions journals is a voluntary page charge (around $110 per page for IEEE society transactions) with a mandatory overlength charge for papers exceeding the page limit; specific numbers for TVLSI should be confirmed in the journal's current Information for Authors rather than assumed.
• Peer review: single-blind; each article evaluated by at least two independent reviewers selected by an editorial board member; plagiarism screening before acceptance; authors must sign the IEEE copyright form (or open-access license for OA articles) before publication.
• Language: manuscripts must be written in standard English; LaTeX is the preferred format.

Authors should consult the journal's scope-and-call-for-papers resources at the official IEEE pages before submitting, particularly the EDICS taxonomy, to ensure the manuscript is assigned to the correct associate editor.

Research Themes

TVLSI's 19 EDICS categories and the journal's publication record identify the following standing research themes:

• Digital circuit design: deep-submicron and low/ultra-low-voltage digital circuits, flip-flops, subthreshold design, arithmetic circuits (adders, multipliers, FFT/number-theoretic transforms), digital signal processing circuits.
• Analog and mixed-signal: circuits consistent with the VLSI/ULSI implementation emphasis — mixed-signal SoCs, data converters, clock distribution, RF and microwave ICs, RF MEMS, energy harvesting.
• Memory: SRAM, DRAM, Flash, and emerging nonvolatile memories (resistive RAM, phase-change memory); 3-D monolithic memory integration.
• Processing in and near memory (PIM): resistive-crossbar and in-memory computing architectures for deep neural networks and other workloads.
• AI hardware: deep neural network accelerators, neuromorphic (spiking) architectures, mixed-signal computing for inference.
• Hardware security: logic locking, Trojan detection, cryptographic hardware, physically unclonable functions, side-channel-resistant design.
• Testing and reliability: design-for-testability, built-in self-test, fault modeling, scan architectures, testing of 3-D stacked dies, soft errors, aging, electromigration.
• EDA and physical design: layout synthesis, CAD tools, EDA for emerging technologies and 3-D ICs, design for manufacturability.
• Processors and systems: CPU design, SoCs for mobile and embedded computing, FPGA-based adaptive computing, high-speed interconnects and SerDes.

Landmark Papers

The following papers published in TVLSI are widely cited within the hardware community. Each DOI was verified against published citation records.

• Zhang, X. & Parhi, K. K. (2004). "High-speed VLSI architectures for the AES algorithm." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 12(9), 957–967. — Published the year after AES was becoming the global encryption standard, this paper's area/speed tradeoffs for AES hardware became a reference point for a generation of cryptographic hardware designers. DOI: 10.1109/TVLSI.2004.832943
• "A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time." TVLSI. — One of the journal's influential hardware-security papers, cited extensively in the Trojan-detection literature; its approach to increasing Trojan activity with negligible area overhead shaped subsequent detection research. DOI: 10.1109/TVLSI.2010.2093547
• "Fast elliptic curve cryptography on FPGA." TVLSI. — A frequently cited FPGA implementation study of elliptic-curve cryptography that informed efficient hardware implementations of public-key cryptography. DOI: 10.1109/TVLSI.2007.912228
• "RF specification test compaction using learning machines." TVLSI. — Applied machine learning to analog/RF test compaction, a widely cited bridge between learning machines and mixed-signal test economics. DOI: 10.1109/TVLSI.2009.2017196
• "Background memory area estimation for multidimensional signal processing systems." TVLSI. — A cited early work on memory hierarchy optimization for DSP systems, influencing later high-level-synthesis memory research. DOI: 10.1109/92.386218

Note: citation counts for individual papers fluctuate across databases; readers can follow any of the DOIs above on IEEE Xplore or the ACM Digital Library for current citation statistics.

Frequently Asked Questions

What is IEEE TVLSI's impact factor?

The journal's most recent Journal Impact Factor reported by Web of Science journal data is 3.2; the IEEE Circuits and Systems Society page lists 3.1. Values from different aggregators differ slightly by release year; treat the current figure as approximately 3.1–3.2.

Is IEEE TVLSI indexed in Web of Science and Scopus?

Yes. The journal is indexed in the Science Citation Index Expanded (SCIE) of the Web of Science and in Scopus, where it carries a CiteScore in the 5.4–5.9 range and an H-index of 122.

Who is the Editor-in-Chief of IEEE TVLSI?

Prof. Mircea Stan is the current Editor-in-Chief, acknowledged in that role in the journal's January 2026 issue (Vol. 34, No. 1). Earlier, Prof. Niraj K. Jha served as Editor-in-Chief.

How do I submit a paper to IEEE TVLSI?

Submissions are made through ScholarOne Manuscripts at mc.manuscriptcentral.com/tvlsiieee. Prepare the manuscript in standard English (LaTeX preferred), with complete references, illustrations, abstract, and index terms, and classify it using the journal's EDICS taxonomy.

Does IEEE TVLSI publish open access?

Yes — TVLSI is a hybrid journal. Authors can choose traditional subscription publication at no charge, or an author-pays open-access option. Corresponding authors from low-income countries may qualify for waived or reduced open-access APCs under IEEE policy.

What is the difference between a paper and a Transactions Brief?

Full papers report substantial original research. Transactions Briefs are shorter contributions — corrections, rebuttals, comments on published results, conjectures, new problems, or announcements of new results — in correspondence format. Briefs have strict page limits.

What is TVLSI's acceptance rate?

IEEE does not publish an official acceptance rate for TVLSI, and no reliable public figure could be verified. Be wary of third-party sites claiming a specific rate.

Can conference papers be extended and submitted?

Yes. The journal's official policy states that expanded versions of conference publications may be submitted, provided the manuscript contains substantial original contributions beyond the conference version.

What are the print and online ISSNs?

Print ISSN 1063-8210; online ISSN 1557-9999.

When was the journal founded?

1993. It has been published monthly and continuously since then, co-sponsored throughout by the IEEE Circuits and Systems, Computer, and Solid-State Circuits societies.

Why It Matters

IEEE Transactions on Very Large Scale Integration (VLSI) Systems is where the abstractions of computer architecture become silicon. Its pages document the design knowledge — from power gating and variability sensors to Trojan detection and neural-network accelerators — that the semiconductor industry ultimately ships. With tri-society sponsorship, monthly publication, and a peer-review process built on at least two independent reviewers per article, TVLSI remains one of the most trusted archival journals for VLSI systems research, and a required venue for authors seeking both visibility and permanence for hardware research.