Academic Journal
Q1Journal of Systems Architecture
About Journal of Systems Architecture
About Journal of Systems Architecture
Journal of Systems Architecture is a peer-reviewed scholarly journal published by Elsevier B.V. (Netherlands). It focuses on Q1. Publication coverage spans 1996-2026.
Key indicators: ISSN 1383-7621; H-index 79.
Understanding This Journal's Metrics
Journal metrics help researchers assess fit, but they must be interpreted in context:
- H-index (79): Strong citation impact — 79 articles cited at least 79 times each, reflecting solid influence.
Publishing in Journal of Systems Architecture
An established venue in its field. The journal welcomes solid, well-executed research. Ensure your manuscript fits the stated scope and follows author guidelines carefully.
- Scope fit: Confirm your research aligns with Q1. Off-scope manuscripts are typically desk-rejected quickly.
- Author guidelines: Follow formatting, reference style, and article-type requirements exactly — non-compliant manuscripts may be returned without review.
Is This Journal Right for Your Paper?
- Audience match: Will the journal's readers cite and build on your findings?
- Timeline: Higher-tier journals mean longer review and higher rejection risk. Balance prestige against your schedule.
- Indexing: Confirm indexing in Web of Science, Scopus, and PubMed (if biomedical) meets your institutional requirements.
- Open access needs: Check funder mandates and whether the journal offers compliant OA options.
Frequently Asked Questions
What is the ISSN of Journal of Systems Architecture?
1383-7621.
Who publishes Journal of Systems Architecture?
Elsevier B.V..
What are Journal of Systems Architecture's metrics?
H-index 79.
Is Journal of Systems Architecture peer-reviewed?
Yes — it is a peer-reviewed scholarly journal indexed in major academic databases.
Source-backed journal facts
Topics in published research
Parallel Computing and Optimization Techniques; Embedded Systems Design Techniques; Interconnection Networks and Systems; Real-Time Systems Scheduling; Advanced Data Storage Technologies; Diverse Scientific and Economic Studies.
OpenAlex classifies topics from published works. These topics are not the publisher’s official aims and scope.
Reported open-access list prices
2,540.00 USD; 2,380.00 EUR; 2,030.00 GBP; 315,040.00 JPY
APC list prices reported by OpenAlex, which obtains this information from DOAJ. Confirm current charges, taxes, waivers and eligibility with the publisher; this is not a fee quotation.
Source: OpenAlex source record. Retrieved 2026-10-03. Source record updated 2026-10-02. OpenAlex metrics are different from SCImago metrics and the Clarivate Journal Impact Factor.
Journal Metrics
Quartile, SJR and the listed SCImago H-index use the 2025 imported SCImago dataset. A quartile may vary by subject category. Values without a source or reporting year are unverified historical entries. Verify the current Journal Impact Factor with Clarivate or the publisher before using it.
Aims & Scope
The publisher’s official aims and scope have not yet been verified for this profile. Use the journal website to check subject fit and accepted article types before submitting.
Recent Research Articles
Latest publications matched automatically by ISSN.
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2026-12 · DOI: 10.1016/j.sysarc.2026.103984A two-round password-based dynamic authenticated group key agreement protocol based on LWE
Yicheng Rong, Fagen Li, Chun Yang, Daoguang Mu et al.
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2026-12 · DOI: 10.1016/j.sysarc.2026.104033Blockchain-assisted cross-domain batch authentication and key agreement scheme for IIoT
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2026-12 · DOI: 10.1016/j.sysarc.2026.103990LIR+LVM: Bounded execution of LLM-generated code on microcontrollers
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Fatima Zaka, Mohammad Imran, Ammara Gul
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2026-12 · DOI: 10.1016/j.sysarc.2026.104036Beyond bare metal: Next-generation industrial control via resource slicing on commodity platforms
Florian Hofer, Andrea Garbugli, Riccardo Venanzi, Armir Bujari et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.104010TSM-V: A time synchronization mechanism for clock-cycle-level distributed computing on RISC-V CPUs
Alejandro Arteaga, Jesús Lázaro, Armando Astarloa
2026-12 · DOI: 10.1016/j.sysarc.2026.103972A survey on post-training quantization for Vision Transformers: Failure modes and deployment constraints
Hafsa Tanveer, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.104001UMerge: I/O-efficient stripe merging in Locally Repairable Codes with uniform locality
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2026-12 · DOI: 10.1016/j.sysarc.2026.103991Lossless graph transformations for memory-efficient on-device machine learning
Jongsung Woo, Seonyeong Heo
2026-12 · DOI: 10.1016/j.sysarc.2026.104000Towards robust privacy unlearning in edge-hosted large language models via attack-aware preference optimization
Shuhan Yang, Peng Chen, Rongzhen Li, Shijing Hu et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.104020Decoupling fairness from consensus: High-performance BFT with asynchronous ordering
Tianyang Li, Jin Wu, Songyan Ji, Jian Dong et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.103982An LLM-based cloud–edge collaborative framework for fraudulent android application detection
Di Liu, Zibo Ma, Shun Zhang, Zhilei Zhao et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.104012CHASE: A CPU-CIM heterogeneous synergistic optimization framework for LLM workloads
Yuhang Li, Renyu Yang, Mei Wen
2026-12 · DOI: 10.1016/j.sysarc.2026.104044PingpongFS: A Self-serving User-level Filesystem Framework for Better Performance and Scalability
Yushuqing Zhang, Kai Lu, Zhenwei Wu, Ruibo Wang et al.
2026-12 · DOI: 10.1016/j.sysarc.2026.104018Eyas: Fast and accurate power estimation at compile time for machine learning applications
Kyunam Park, William J. Song
2026-12 · DOI: 10.1016/j.sysarc.2026.104005GigaRDL: A GPU-resident architecture for SI-proxy-aware RDL routing in chiplet packages
Wendi Lin, Yadi Lin
2026-12 · DOI: 10.1016/j.sysarc.2026.103969Reviews
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Version History
October 9, 2026 at 8:29 pm
September 25, 2026