On-chip two-mode division multiplexing using tapered directional coupler-based mode multiplexer and demultiplexer

We demonstrate a novel on-chip two-mode division multiplexing circuit using a tapered directional coupler-based TE(0)&TE(1) mode multiplexer and demultiplexer on the silicon-on-insulator platform. A low insertion loss (0.3 dB), low mode crosstalk (< -16 dB), wide bandwidth (~100 nm), and large fabrication tolerance (20 nm) are measured. An on-chip mode multiplexing experiment is carried out on the fabricated circuit with non return-to-zero (NRZ) on-off keying (OOK) signals at 40 Gbit/s. The experimental results show clear eye diagrams and moderate power penalty for both TE(0) and TE(1) modes.