A Cascade Multilevel Converter Topology With Reduced Number of Switches

This paper introduces a new multilevel converter topology that has many steps with fewer power electronic switches. The proposed circuit consists of series-connected submultilevel converters blocks. The optimal structures of this topology are investigated for various objectives, such as minimum number of switches and capacitors, and minimum standing voltage on switches for producing maximum output voltage steps. A new algorithm for determination of dc voltage sourcespsila magnitudes has also been presented. The proposed topology results in reduction of the number of switches, losses, installation area, and converter cost. The operation and performance of the proposed multilevel converter has been verified by the simulation and experimental results of a single-phase 53-level multilevel converter.