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28nm FDSOI technology platform for high-speed low-voltage digital applications

N. Planes, O. Weber, V. Barral, S. Haendler, Daniel Noblet, Damien Croain, M. Bocat, Pierre-Olivier Sassoulas, X. Federspiel, A. Cros, Aurelie Bajolet, Emmanuel Richard, Benjamin Dumont, Pierre Perreau, David Petit, Dominique Golanski, Claire Fenouillet-Beranger, N. Guillot, Mustapha Rafik, V. Huard, Sophie Puget, Xavier Montagner, M.-A. Jaud, O. Rozeau, O. Saxod, François Wacquant, Frederic Monsieur, D. Barge, Luc Pinzelli, Maxime Mellier

📄 Abstract

For the first time, a full platform using FDSOI technology is presented. This work demonstrates 32% and 84% speed boost at 1.0V and 0.6V respectively, without adding process complexity compared to standard bulk technology. We show how memory access time can be significantly reduced thanks to high Iread, by keeping competitive leakage values. Yield of ∼14Mb SRAM cells is demonstrated, allowing to measure for the first time Vmin of SRAM arrays.

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